Video IP Cores

FPGAs are omnipresent in embedded boards and are now emerging as an inherent part of embedded systems, including real-time systems. From the role of simple devices that can hold glue logic, FPGAs have rapidly grown to multimillion gate devices that can hold entire digital systems. This rapid stride in technology has reached a stage where it is hard to design a complete system from scratch. Industry has started designing SoCs from a large repertoire of Intellectual Property Components or IP Cores sold by many vendors.

NeST has developed its own portfolio of IP cores by leveraging its vast experience in embedded - FPGA domain to identify the IP cores those are significant to the industrial community and to come up with easy-to-use, high performance, small footprint IP cores, all indigenously developed, implemented & tested in own applications.

NeST repertoire includes high performance real-time video processing cores, implemented and tested in FPGAs, like Video Scaler, Video Sharpness Enhancer, Gamma Correction and Video quality enhancement IP cores. These IP cores are ideally suited for all high performance real time video & image processing applications implemented in FPGA where input/ output delays are critical. All the IP cores are optimized for Xilinx Virtex-5 FPGA devices, and supports resolutions from 320x240 (QVGA) to 1280x1024 pixels (SXGA).

Video Scaler

The Video Scaler engine resizes video streams. It converts an input video of dimensions Xin pixels by Yin lines to an output video of dimensions Xout pixels by Yout lines.

Features

  • Versatile RGB-video scaling engine capable of scaling up or down by any aspect ratio
  • Independently programmable scaling factors for horizontal and vertical size
  • Support for real time video streaming and frame buffer processing
  • Features 8-phase bilinear interpolation filter
  • Fully programmable filter coefficients to suit desired application

Applications

  • Post processing of video signals from digital camera
  • Medical Imaging applications
  • Home media solutions
  • Video Surveillance
  • Consumer displays
Gamma Correction

The Gamma Correction engine may be used to correct the non-linearity of display devices while displaying images. It encodes linear luminance or RGB values to match the non-linear characteristics of display devices.

Features

  • Programmable gamma tables
  • Three color LUT structure
  • Configurable pixel bit depth; from 8 to 12 bits
  • General purpose processor interface with optional double or single buffering scheme
  • Optional interpolated output values
  • Technology independent implementation

Applications

  • Pre-processing block for image sensors
  • Post-processing block for image data adjustment
  • Intensity correction
  • Video surveillance
  • Consumer displays
  • Video conferencing
  • Machine vision
Brightness Enhancer

Brightness Enhancer IP Core enhances the brightness of input video stream aiding system designers to implement this feature in miniature video processing systems using FPGAs. The brightness adjustment algorithm runs in RGB domain.

Features

  • Real time video processing
  • Support for RGB 8:8:8
  • 256 programmable brightness steps
  • Pixel by Pixel Processing
  • Requires only a single clock input

Applications

  • Medical Endoscope
  • Consumer Displays
  • Video Surveillance
  • Conferencing
  • Machine Vision
Color Enhancer

Color Enhancer IP core is a video processing core that provides a stand-alone mechanism to adjust the color properties of RGB video source. The use of high-performance XtremeDSP Slices in Virtex-5 FPGA provides an added advantage of performing all math operations, relatively at a much higher speed.

Features

  • Real time video processing
  • Support 64 levels of Color adjustment
  • Supports RGB 8:8:8 colour format
  • Pixel by pixel processing

Applications

  • In-Car Entertainment
  • Image Processing
  • Surveillance Systems
  • Handheld Devices
  • Medical Monitors
  • Consumer Displays
Sharpness Enhancement

Sharpness Enhancement engine adjusts sharpness of input image for a given sharpness level. A 3x3 Laplacian 2nd order derivative kernel is the basis of sharpness enhancement IP core.

Features

  • Features 3 x 3 eight neighbor Laplacian kernel
  • Programmable 16/32/64 levels of sharpness adjustment
  • Programmable sharpness ranges 0.5,1,2, and 4
  • Support real time video streaming in RGB domain

Applications

  • Post processing of video signals from digital camera
  • Medical Imaging applications
  • Home media solutions
  • Video Surveillance
  • Consumer displays
Contrast Enhancer

Contrast Enhancer IP Core is a video processing IP core used to enhance the contrast of input video stream. Contrast control IP core helps system designers to implement the feature with minimum extra effort. The architecture takes advantage of high-performance XtremeDSP slices.

Features

  • Real time video processing
  • Support for RGB 8:8:8
  • 256 programmable contrast steps
  • Pixel by pixel processing
  • Requires only a single clock input

Applications

  • Medical Endoscope
  • Consumer Displays
  • Video Surveillance
  • Video Conferencing
  • Machine Vision